Schematic Design Of Transistor Level NAND & NOR Gate
1. Identify the symbol for NAND gate.
2. Identify the symbol for NOR gate.
3. What is the correct representation (in terms of switches) for two n-devices connected in series having inputs 0 & 1?
4. What is the correct representation (in terms of switches) for two p-devices connected in series having both inputs as 1?
5. Which of the following Boolean expressions is represented by the given Karnaugh map? 
6 Which of the following Boolean expressions is represented by the given Karnaugh map? 
7. Which combination of logic gates is correct for the expression ABCD?
8. Which combination of logic gates is correct for the following expression? 