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Aim
Theory
Objective
Procedure
Pretest
Demo
Practice
Assignment
Posttest
References
Contributors
Feedback
Schematic Design Of Transistor Level NAND & NOR Gate
To design a 2 input NAND gate using 2 NMOS and 2 PMOS
To design a 2 input NOR gate using 2 NMOS and 2 PMOS