References

Books and Textbooks

1. Hennessy, J. L., & Patterson, D. A. (2019). Computer Architecture: A Quantitative Approach (6th ed.). Morgan Kaufmann.

   • Chapter 3: Instruction-Level Parallelism and Its Exploitation
   • Section 3.4: Dynamic Scheduling with the Tomasulo Algorithm

2. Shen, J. P., & Lipasti, M. H. (2013). Modern Processor Design: Fundamentals of Superscalar Processors. Waveland Press.

   • Chapter 6: Instruction Scheduling
   • Section 6.3: Register Renaming

3. Stallings, W. (2018). Computer Organization and Architecture: Designing for Performance (11th ed.). Pearson.

   • Chapter 14: Instruction-Level Parallelism and Superscalar Processors

Historical Papers

4. Tomasulo, R. M. (1967). An efficient algorithm for exploiting multiple arithmetic units. IBM Journal of Research and Development, 11(1), 25-33.

   • Original paper describing the Tomasulo algorithm

5. Anderson, D. W., Sparacio, F. J., & Tomasulo, R. M. (1967). The IBM System/360 model 91: Machine philosophy and instruction-handling. IBM Journal of Research and Development, 11(1), 8-24.

6. Kessler, R. E. (1999). The Alpha 21264 microprocessor. IEEE Micro, 19(2), 24-36.

   • Modern implementation of dynamic scheduling concepts

Research Papers

7. Yeager, K. C. (1996). The MIPS R10000 superscalar microprocessor. IEEE Micro, 16(2), 28-40.

8. Gwennap, L. (1996). Digital 21264 sets new standard. Microprocessor Report, 10(14), 11-16.

9. Kessler, R. E., McLellan, E. J., & Webb, D. A. (1998). The Alpha 21264 microprocessor architecture. Proceedings of the International Conference on Computer Design, 90-95.

Online Resources

10. IBM Corporation. (1967). IBM System/360 Model 91 Functional Characteristics. IBM Corporation.

    • Historical documentation of the first Tomasulo implementation

11. Intel Corporation. (2019). Intel 64 and IA-32 Architectures Optimization Reference Manual.

    • Chapter 2: Intel Microarchitecture
    • Section on Out-of-Order Execution

12. AMD Corporation. (2020). Software Optimization Guide for AMD Family 17h Processors.

    • Chapter 2: Instruction Scheduling and Resource Management

Academic Resources

13. University of California, Berkeley. CS152 Computer Architecture Course Materials.

    • Lecture notes on Dynamic Scheduling and Tomasulo Algorithm

14. Stanford University. EE382 Computer Architecture Course Materials.

    • Advanced topics in superscalar processor design

15. MIT OpenCourseWare. 6.823 Computer System Architecture.

    • Course materials on instruction-level parallelism