Virtual Labs

4-to-16 decoder using 3-to-8 decoder (74138).

The number of individual decoders required to construct desired decoder circuit is given by ______ , where 'n' is the number of input lines in available decoder and 'N' is the number of input lines in desired decoder

a: 2⁽N/n⁾ b: 2(N+n) c: 2(N-n) d: 2(Nn)

The three enable pins in IC 74138 are as

a: Two pins are active low and one pin is active high. b: Two pins are active high and one pin is active low. c: Three pins are active high. d: Three pins are active low.

Benefit of 3 enable pins in IC 74138 is

a: Increase the necessity of three outside gates. b: Decrease the necessity of three outside gates. c: Increase the necessity of three inside gates. d: Decrease the necessity of three inside gates.

Advantages of IC 74138 include

a: Low speed. b: Low power consumption. c: High Propagation delay. d: It can used for encoding.

For making a 4 to 16 Decoder by using logic gates only we require

a: 4 NOT gates and 16 AND gates. b: 16 NOT gates and 4 AND gates. c: 8 NOT gates and 8 AND gates. d: 3 NOT gates and 8 AND gates.

Why are the enable lines specifically used for connecting two or more IC packages in accordance to its application in decoder circuit?

a: It allows the reduction of digital function into similar function with more inputs and outputs. b: It allows the reduction of digital function into different function with more inputs and outputs. c: It allows the expansion of digital function into similar function with more inputs and outputs. d: It allows the expansion of digital function into different function with more inputs and outputs.

Output 6 of 74138 octal decoder is selected when it is enabled by a data input of

a: A₀ = 0, A₁ = 0, A₂ = 1 b: A₀ = 1, A₁ = 1, A₂ = 0 c: A₀ = 0, A₁ = 1, A₂ = 1 d: A₀ = 1, A₁ = 0, A₂ = 0

How many 1-of-16 decoders are required for decoding a 7-bit binary number?

a: 5 b: 6 c: 7 d: 8

The functionality implemented by the circuit below is

a: 2 to 1 multiplexer b: 4 to 1 multiplexer c: 7 to 1 multiplexer d: 6 to 1 multiplexer

The Boolean expression f(a,b,c) in its canonical form for the decoder circuit shown is

a: ∏ M (4,6) b: ∑ m (0,1,2,3,5,7) c: ∑ m (4,6) d: ∏ M (0,1,2,3,5)