Detection of both SA0 and SA1 faults on a VLSI circuit for 4-bit EVEN parity checker circuit

  1. To detect both SA0 (stuck-at-0) and SA1 (stuck-at-1) faults on a 4-bit EVEN parity checker circuit.
  2. To verify the truth table of a 4-bit EVEN parity checker circuit and observe the output of the circuit with faults set at required lines.