Data Hazards and Instruction Scheduling
What type of data hazard occurs when an instruction needs a value that is yet to be written by a previous instruction?
Consider the following instruction sequence:
1. LOAD R1, 0(R2)
2. ADD R3, R1, R4
Which type of hazard may occur?
1. LOAD R1, 0(R2)
2. ADD R3, R1, R4
Which type of hazard may occur?
What is the role of instruction scheduling in handling data hazards?
Given the sequence:
1. MUL R1, R2, R3
2. ADD R4, R1, R5
3. SUB R6, R4, R7
Which pairs of instructions have RAW hazards?
1. MUL R1, R2, R3
2. ADD R4, R1, R5
3. SUB R6, R4, R7
Which pairs of instructions have RAW hazards?
In a 5-stage pipeline without forwarding, what issue may arise in the following sequence?
1. MUL R1, R2, R3
2. DIV R4, R1, R5
1. MUL R1, R2, R3
2. DIV R4, R1, R5
Which reordering of the following maintains correctness?
Original:
ADD R1, R2, R3;
SUB R4, R1, R5;
MUL R6, R4, R7
Original:
ADD R1, R2, R3;
SUB R4, R1, R5;
MUL R6, R4, R7
What hazard arises when instruction A writes to a register after instruction B reads it?
Which of the following introduces a WAW hazard?
What is a correct strategy to eliminate a WAR hazard in a pipeline?