Virtual Labs

Delay Estimation In Chain Of Inverters

1. What you mean by delay?

a: Time to correctly access the input Explanation

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b: Time to correctly access the output Explanation

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c: Average rise time and fall time Explanation

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d: Time taken for the output to come after the input has been captured Explanation

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2. Can we reduce delay to zero?

a: Yes Explanation

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b: No Explanation

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c: Yes in most of the cases Explanation

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d: Yes in very few cases Explanation

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3. The optimum size of each inverter is ________ of its neighbours

a: Geometric mean Explanation

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b: Arithmetic mean Explanation

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c: Geometric or arithmetic mean Explanation

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d: None of the above Explanation

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4. What does Cg1 corresponds to in the following formula?

a: Input gate capacitance of the last inverter driving capacitative load Explanation

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b: Sum of input capacitances of all the inverter in series Explanation

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c: Input gate capacitance of first inverter in series Explanation

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d: None of the above Explanation

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5. If the gate size is increased by n then what will be the effect on its resistance?

a: Increases by n Explanation

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b: Decreases by n Explanation

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c: Decreases by n² Explanation

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d: Remains constant Explanation

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6. If the gate size is increased by n then what will be the effect on its capacitance?

a: Increases by n² Explanation

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b: Increases by n Explanation

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c: Decreases by n Explanation

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d: Remains constant Explanation

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7. Choose the correct statement from the following.

a: All the inveters in series are kept to be of same size for minimum delay Explanation

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b: The inverter size does not matter as long as the inverter driving the load has very big size Explanation

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c: The inverter size does not matter as long as the inverter driving the load has very small size Explanation

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d: The size of the inverter driving the load is maximum of all and is some multiple of size of the previous inverters Explanation

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8. For minimum delay, what is the number of inverters in the chain connected in series?

a: 4 Explanation

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b: 5 Explanation

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c: 6 Explanation

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d: Need to calculate according to the situation given, it is not fixed. Explanation

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9. Let a be the stage ratio of an inverter chain. What is its optimum value to drive a load capacitor with minimum delay?

a: 4 Explanation

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b: 1/e Explanation

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c: 2 Explanation

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d: e Explanation

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10. In the above question, if parasitic capacitances are taken into consideration then what is the optimum value of a?

a: 4 Explanation

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b: e Explanation

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c: 1/e Explanation

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d: 2 Explanation

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