Tools
Performance Tool
Validation Tool
Aim
Theory
Objective
Procedure
Pretest
Simulation
Posttest
Assignment
References
Contributors
Feedback
Aim
Theory
Objective
Procedure
Pretest
Simulation
Posttest
Assignment
References
Contributors
Feedback
Design of an Up-Counter using Verilog
"Verilog HDL - A guide to Digital Design and Synthesis" by Samir Palnitkar
"Verilog Tutorial" by Deepak Kumar Tala
"Verilog tutorial based on Weste and Harris" edited by Lukasz Strozek