Interactive exploration of distributed cache coherence mechanisms

How to Use This Simulator

Protocol States:

  • Cache States: Invalid (I), Shared (S), Modified (M)
  • Directory States: Uncached (U), Shared (S), Exclusive (E)
  • Sharer Vector: Tracks which processors have copies (e.g., 1100 = P0,P1)
  • Cache-to-Cache: Direct data transfer between processors

Instructions:

  1. Select a processor (P0, P1, P2, or P3)
  2. Choose operation type (Read or Write)
  3. Select memory block (A, B, C, or D)
  4. For writes, enter data value (e.g., 0xFF)
  5. Click "Execute Operation" or use "Step Through" for detailed view
  6. Watch cache states, directory updates, and network messages

Simulation Controls

Processor Cache States

Directory Table

Block State Sharers Owner

Network Message Flow

Directory
Ready
P0
Idle
P1
Idle
P2
Idle
P3
Idle
Active Messages:

No active messages

Current Operation Status

No operation in progress

Protocol Message Log

Performance Metrics

Protocol Information

Cache States
Invalid (I) Shared (S) Modified (M)
Directory States
Uncached (U) Shared (S) Exclusive (E)
Message Types
Read-Request Data-Reply Invalidate Forward-Request