ADD Rdest, Rsrc1, Rsrc2
— add two registersSUB Rdest, Rsrc1, Rsrc2
— subtract two registersAND Rdest, Rsrc1, Rsrc2
— bitwise AND two registersMOV Rdest, constant
— load immediate into a registerBEQ R1, R2, label
— branch if equalBNE R1, R2, label
— branch if not equalMOV R0, 0
MOV R1, 5
MOV R2, 3
MOV R3, 1
LOOP:
ADD R0, R0, R3
BEQ R0, R1, END
ADD R2, R2, R3
BNE R1, R0, LOOP
END:
NOP
Trace: B0:N, B1:T, B0:N, B1:T, B0:N, B1:T, B0:N, B1:T, B0:T
MOV R0, 0
MOV R1, 0
MOV R2, 10
MOV R3, 1
LOOP:
AND R4, R0, R3
BNE R4, R3, CONT
ADD R1, R1, R3
CONT:
ADD R0, R0, R3
BNE R0, R2, LOOP
END:
NOP
Trace: B0:T, B1:T, B0:N, B1:T, B0:T, B1:T, B0:N, B1:T, B0:T, B1:T, B0:N, B1:T, B0:T, B1:T, B0:N, B1:T, B0:T, B1:T, B0:N, B1:N
MOV R0, 0
MOV R1, 5
MOV R2, 3
MOV R3, 1
LOOP:
ADD R0, R0, R3
BEQ R0, R1, END
ADD R2, R2, R3
BNE R1, R0, LOOP
END:
NOP
Trace: B0:N, B1:T, B0:N, B1:T, B0:N, B1:T, B0:N, B1:T, B0:T
Format: B{id}:{T|N} separated by commas (T=Taken, N=Not Taken)